ARM registers and instructions

Data sizes and instruction sets

ARM is RISC Architecture

• Most instructions execute in a single cycle

Arm is a 32 bit load / store architecture

• The only memory accesses allowed are loads and stores
• Most internal registers are 32 bits wide

When used in relation with ARM

• Halfword means 16 bits (2 bytes)
• Word means 32 bits (4 bytes)
• Doubleword means 64 bytes (8 bytes)

Most ARM cores implement two instruction sets

• 32 bit ARM instruction set

ARM Register set

• There are 16 general purpose registers
• Some of the registers have special significance
  • r15 - program counter (pc)
  • r14 - link register (lr)
  • r13 - stack pointer (sp)
• there are also two status registers
  • Current program status register (CPSR)
  • Saved program status register (SPSR)
    • Only present in exception modes
  • Only accessible by some instructions

Instruction Sets

• The ARM Architecture provides 2 main instruction sets

ARM

• All instructions are 32 bit
• Most instructions can be executed conditionally

Thumb (with Thumb 2 Technology)

• Mixed 16 and 32 bit instruction set
• Most instructions are not conditional
  • Can be made conditional using if, then, else instructions
• Some instructions are less flexible than their ARM equivalents

C/C++ code will normally be compiled to thumb

• Gives best code density/performance mix for most code

Assembler Syntax

Data processing instructions

<operation><condition> Rd, Rm, <op2>
ADDEQ r4, r5, r6
MOV r4, #7

Memory access instructions

<operation><size> Rd, [<address>]
LDR r0, [r6, #4]
STRB r4, [r7], #8
 
<operation><addressing mode> <Rn>!, <registers list>
LDMIA r0, {r1, r2, r7}
STMFD sp!, {r4-r11, lr}

Program flow instructions

<branch><label>
BL foo
B bar

AAPCS (ARM Application Procedure Call Standard)

• The compiler has to follow a set of rules to determine how to pass parameters to a function.
• r1, r2, r3 - arguments into function results from function otherwise corruptible
• r4-r11 - Register variables must be preserved
• r12 - scratch register (corruptible)
• r13 - stack pointer (sp)
• r14 - link register (lr)
• r15 - program counter (pc)