ARM Pipelining

• This is the mechanism through which a RISC processor executes its instructions
• This speeds up execution by fetching the next instruction while other instructions are being decoded and executed.

Types of Pipelining

1. Software Pipelining
   1. Can handle complex instructions
   2. Allows programs to be reused
2. Hardware Pipelining
   1. Helps designer manage complexity - a complex task can be divided into smaller, more manageable pieces
   2. Hardware pipelining offers higher performance

Types of Hardware Pipelines

1. Instruction Pipeline: This is very similar to a manufacturing assembly line.
2. Data Pipeline: It is designed to pass data from stage to stage.

Advantages/Disadvantages of Pipelining

Advantages

• More efficient use of processor
• Quicker time of execution of a large number of instructions

Disadvantages

• Pipelining involves adding hardware to the chip
• Inability to continuously run the pipeline at full speed because of pipeline hazards which disrupt the smooth execution of the pipeline.

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ARM7 3 stage pipelining

1. Fetch: Loads an instruction from memory
2. Decode: Identifies the instruction to be executed
3. Execute: Processes the instruction and writes the result back to a register.

ARM9TDMI 5 stage pipelining

• The execute stage has been split to allow for greater throughput
• At least double the processing power is available thanks to double the operating frequency for ARM9

1. Fetch
2. Decode
3. Execute
4. Buffer/Data ⇒ Memory
5. Write-back ⇒ Write

ARM10 6 stage pipelining

1. Fetch
2. Issue
3. Decode
4. Execute
5. Memory
6. Write

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Memory and I/O

• This stage is responsible for storing and loading values to and from memory.
• It is also responsible for input or output from the processor.
• If the current instruction is not of memory or IO type then the result from the ALU is passed through to the writeback stage.
• The Write-back (WB stage is responsible for writing the result of the calculation, memory access or input into the register file.